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STARC Selects Co-Design Automation's Simulator as Key Component of Next Generation Methodology
TOKYO--(BUSINESS WIRE)--July 9, 2001--
Co-Design Automation, Inc., an Electronic Design Automation (EDA)
software supplier, announced today that the Semiconductor Technology
Academic Research Center (STARC) will utilize its SYSTEMSIM(TM)
simulation technology in the development of a next-generation system
design methodology.
STARC is an organization funded by Japan's leading semiconductor
manufacturers with the aim of strengthening the country's
technological foundation in electronic systems design as well as
enhance international competitiveness. STARC member companies include
Fujitsu, Hitachi, Matsushita, Mitsubishi, NEC, OKI, Rohm, Sanyo,
Sharp, Sony and Toshiba.
``Co-Design Automation has enabled a technology leap with its
SYSTEMSIM product, providing a powerful mechanism for the efficient
incorporation of HDL models within C/C++ programs,'' notes Muraoka
Michiaki, senior manager at STARC. ``We are intrigued by the potential
of this technology applied to the advanced system design methodologies
that we are establishing, and see it playing a significant role in
design and verification moving forward.''
SYSTEMSIM will be utilized in the system exploration methodology
phase, where design intent and algorithmic structure are established
before system partitioning. During this phase, the use of advanced
languages is critical. SYSTEMSIM's multi-lingual kernel enables the
easy application of varied system descriptive capabilities together
with hardware description language (HDL) and C models. SYSTEMSIM may
also be used to provide key platform infrastructure throughout the
system design process.
``STARC is setting the pace in leading edge electronic design
methodology research, both in Japan and worldwide,'' observes Simon
Davidmann, Co-Design Automation's president and chief executive
officer. ``We are delighted that it has chosen to incorporate SYSTEMSIM
in its work to define the next generation system design flow,
reaffirming the power of our technology for state-of-the-art
electronics design.''
About STARC
The Semiconductor Technology Academic Research Center (STARC) was
established to effectively promote the development of new technologies
by fostering viable cooperation between industry and academia in
Japan. Funded by Japan's leading semiconductor manufacturers, it aims
to strengthen the country's technological foundation concerning
silicon semiconductors, and enhance international competitiveness by
commissioning universities for basic research and/or promoting joint
projects with them on a sizable scale. By doing so, the center hopes
to contribute to industrial growth not only on a domestic level, but
also on a global scale. Creative and unique research results with
great applicability are most likely to come about from such
activities. Further, the center will act as a place to nurture young
engineers and researchers with a strong interest and development as
the backbone of the future semiconductor industry. Please visit the
web site at www.starc.or.jp.
About Co-Design Automation
Co-Design Automation is an EDA company focused on the efficient
creation, implementation, and verification of system on chip (SOC)
designs. It is privately held and funded by investors from within the
EDA developer and user communities. The staff includes notable
simulation experts Phil Moorby, creator of the Verilog HDL and the
first fellow at Cadence Design Systems, Inc. (NASDAQ: CDN), and Peter
Flake, creator of the HILO HDL. In 1999, Co-Design announced the
SUPERLOG(TM)system design language, now utilized by 15 partner
companies. Its products -- SYSTEMSIM and SYSTEMEX -- are achieving
success throughout the electronics industry worldwide in system
platform and advanced verification applications. Corporate
headquarters is in Los Altos, Calif. Telephone: (877) 6 CODESIGN.
Facsimile: (408) 273-6025. Email: info@co-design.com. On-line
information is found at its Web Sites: http://www.co-design.com and
http://www.superlog.org.
SUPERLOG is a registered trademark and SYSTEMSIM, SYSTEMEX, CBlend
are trademarks of Co-Design Automation, Inc. Verilog is a trademark of
Cadence Design Systems, Inc. Co-Design Automation acknowledges
trademarks or registered trademarks of other organizations for their
respective products and services.
Contact:
Co-Design Automation, Inc.
David Kelf
(617) 571-9883
davek@co-design.com
or
Nanette Collins
(617) 437-1822
nanette@nvc.com
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